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Skylake documentation bug

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This is for Intel® 64 and IA-32 Architectures Optimization Reference Manual, Order Number: 248966-039 December 2017, Page 2-6.

 

In Figure 2-3. CPU Core Pipeline Functionality of the Skylake Microarchitecture, Port 6 correctly lists Int Shft as a function. However, Port 0 does not list Int Shft. My evidence for this being a docubug is that Int Shft is listed for port 0 and port 6 for Haswell in Figure 2-4. CPU Core Pipeline Functionality of the Haswell Microarchitecture. Also Agner Fog in his empirically derived Instruction Tables reference lists SHR SHL SAR r,i as using p06 for Skylake.
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